1 radiation hardened quad differential line driver hs-26c31rh, hs-26c31eh the intersil hs-26c31rh, hs-26c31eh are quad differential line drivers designed for digi tal data transmission over balanced lines and meets the requirements of eia standard rs-422. radiation hardened cm os processing assures low power consumption, high speed, and reliable operation in the most severe radiation environments. the hs-26c31rh, hs-26c31eh accept cmos levels and converts them to rs-422 compatible outputs. these circuits uses special outputs that enable the drivers to power-down without loading down the bus. enable and disable pins allow several devices to be connected to the same data source and addressed independently. specifications for rad hard qml devices are controlled by the defense logistics agency land and maritime (dla). the smd numbers listed here must be used when ordering. detailed electrical specifications for these devices are contained in smd 5962-96663 . a ?hot-link? is provided on our homepage for downloading. features ? electrically screened to smd # 5962-96663 ? qml qualified per mil-prf-38535 requirements ? 1.2 micron radiation hardened cmos - total dose up to . . . . . . . . . . . . . . . . . . . . . . . . 300krad(si) ?latchup free ? eia rs-422 compatible outputs (except for ios) ? cmos inputs ? high impedance outputs when disabled or powered down ? low power dissipation . . . . . . . . . . . . 2.75mw standby (max) ?single 5v supply ? low output impedance . . . . . . . . . . . . . . . . . . . . . . 10 or less ? full -55c to +125c military temperature range applications ? line transmitter for mil-std-1553 serial data bus ordering information ordering number (note) internal mkt. number part marking temp. range (c) package (pb-free) pkg. dwg. # 5962f9666301qec hs1-26c31rh-8 q 5962f96 6630qec -55 to +125 16 ld sbdip d16.3 5962f9666301qxc hs9-26c31rh-8 q 5962f96 66301qxc -55 to +125 16 ld flatpack k16.a 5962f9666301vec hs1-26c31rh-q q 5962f96 66301vec -55 to +125 16 ld sbdip d16.3 5962f9666301vxc hs9-26c31rh-q q 5962f96 66301vxc -55 to +125 16 ld flatpack k16.a hs1-26c31rh/proto hs1-26c31rh/proto hs1- 26c31rh/proto -55 to +125 16 ld sbdip d16.3 hs0-26c31rh/sample hs0-26c31rh/sample -55 to +125 die hs9-26c31rh/proto hs9-26c31rh/proto hs9- 26c31rh/proto -55 to +125 16 ld flatpack k16.a 5962f9666301v9a hs0-26c31rh-q -55 to +125 die 5962f9666303vec hs1-26c31eh-q q 5962f96 66303vec -55 to +125 16 ld sbdip d16.3 5962f9666303vxc hs9-26c31eh-q q 5962f96 66303vxc -55 to +125 16 ld flatpack 5962f9666303v9a HS0-26C31EH-Q die note: these intersil pb-free hermetic packaged products employ 100% au plate - e4 termination finish, which is rohs compliant and compatible with both snpb and pb-free soldering operations. caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | copyright intersil americas inc. 2011, 2013. all rights reserved intersil (and design) is a trademark owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners. january 8, 2013 fn3401.6
hs-26c31rh, hs-26c31eh 2 intersil products are manufactured, assembled and tested utilizing iso9000 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description only. intersil corporat ion reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is believed to be accurate and reliable. however, no responsi bility is assumed by intersil or its subsid iaries for its use; nor for any infringem ents of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of i ntersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com fn3401.6 january 8, 2013 for additional products, see www.intersil.com/en/products.html pin configurations hs1-26c31rh, hs1-26c31eh (16 ld sbdip) cdip2-t16 top view hs9-26c31rh, hs9-26c31eh (16 ld flatpack) cdfp4-f16 top view logic diagram 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 ain ao ao enable bo bo gnd bin vdd do do enable co co cin din ain ao ao enable bo bo bin gnd 2 3 4 5 6 7 8 116 15 14 13 12 11 10 9 vdd din do do enable co co cin enable enable ain ao bin bo cin co din do do co bo ao
hs-26c31rh, hs-26c31eh 3 fn3401.6 january 8, 2013 die characteristics die dimensions: 96.5 mils x 195 mils x 21 mils (2450 x 4950) interface materials: glassivation: type: psg (phosphorus silicon glass) thickness: 10k ? 1k ? metallization: m1: mo/tiw thickness: 5800 ? m2: al/si/cu (top) thickness: 10k ? 1k ? substrate: avlsi1ra backside finish: silicon assembly related information: substrate potential (powered up): v dd additional information: worst case current density: <2.0x10 5 a/cm 2 bond pad size: 110mx100m metallization mask layout hs-26c31rh, hs-26c31eh (14) do (13) do (12) enable (11) co (10) co ao (2) ao (3) enable (4) bo (5) bo (6) bin (7) gnd (8) cin (9) gnd (8) (1) ain (16) vdd (15) din (16) vdd
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